corex dram0 permission configuration register 1
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0 | core0/core1’s permission of data region0 of SRAM in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1 | core0/core1’s permission of data region1 of SRAM in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2 | core0/core1’s permission of data region2 of SRAM in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3 | core0/core1’s permission of data region3 of SRAM in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0 | core0/core1’s permission of dcache data sram block0 in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1 | core0/core1’s permission of dcache data sram block1 in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0 | core0/core1’s permission of data region0 of SRAM in world1. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1 | core0/core1’s permission of data region1 of SRAM in world1. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2 | core0/core1’s permission of data region2 of SRAM in world1. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3 | core0/core1’s permission of data region3 of SRAM in world1. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0 | core0/core1’s permission of dcache data sram block0 in world1. |
| CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1 | core0/core1’s permission of dcache data sram block1 in world1. |
| CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS | core0/core1’s permission(sotre,load) of rom in world0. |
| CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS | core0/core1’s permission(sotre,load) of rom in world1. |